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Infineon designs, develops, manufactures, and markets a broad range of semiconductors and semiconductor-based solutions, focusing on key markets in the automotive, industrial, and consumer sectors. Its products range from standard components to special components for digital, analog, and mixed-signal applications to customer-specific solutions together with the appropriate software.
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This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.
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- Work closely with RF Designers to iterate circuit layouts to achieve performance.
- Perform critical circuit block, subsystem and top-level layout and verification using state-of-the art tools (Cadence Virtuoso--VXL & Mentor Calibre) and techniques in advanced RF node processes.
- Participate in layout design of RF circuits (block/IP/chip) floor planning from scratch, performing routing & layout verification and resolve violations.
- Lead/co-lead the physical layout of IP of RF layout design by working closely with cross functional team leader.
- Conduct thorough layout design reviews internally & external review with circuit designers.
- Plan overall project schedule and distribute tasks to project team members.
- Capable in guiding/coaching junior engineers for on time delivery & quality.
- Bachelor’s Degree in Electrical/Electronic Engineering/Physics with VLSI exposure or equivalent 9 to 12 years of job experience in RF layout design field is preferred.
- Hands on experience in RF layout from scratch. Knowledge & experience in radio frequency (RF) layout is mandatory.
- Strong expertise in leading in one or more of the following IP Layouts
- RF modules (high frequency circuits) – LNA, Mixer, PA, VCO for WLAN, BT chip
- Experience with layout design and verification of high-performance RF transmitter, receiver, PLL subsystems.
- Deep understanding of analog circuit layout concepts in submicron CMOS technologies
- Expertise on matching, parasitic reduction, ESD, DFM etc.
- Possess strong technical, analytical & problem-solving skills in analog layout design.
- Capable in driving ideas towards implementation for layout productivity, quality and methodology improvement.
- Ability to work as strong team player and participate in cross-functional activities.
- Good interpersonal, verbal and communication skill with good initiative at work.